In work package 1 we will develop materials, processes and devices to be used in WP2 and WP3.

The topics include:

• Material synthesis with emphasis on III-V nanowire epitaxial growth both using metal organic vapor phase epitaxy and aerotaxy.
• Scaling of nanowire growth substrates from individual dies to 100 mm Si wafers
• Nanowire surface passivation for photonic devices and gate-stack optimization for transistors
• Introduction of ferroelectric HfZrO for reconfigurable electronics and ultrafast optoelectronic switching
• Device processing for heterogeneous 3D integration of FDSOI CMOS and III-V components.
• Transfer of layers and devices for monolithic 3D integration
• Development of 3D Interconnect technology